Performance issues for Add Hard Connection in Schematic Design for Virtual Circuits (Doc ID 1192504.1)

Last updated on OCTOBER 22, 2013

Applies to:

Oracle Communications MetaSolv Solution - Version 6.0.15 to 6.2.0 [Release 6.0.15 to 6.2.0]
Information in this document applies to any platform.
***Checked for relevance on 22-OCT-YYYY***


Symptoms

When performing manual Schematic design on virtual circuit, it takes 4 to 5 minutes to pull data on each
network element (DSLAM, Switch and Routers). Making the connection itself seems to be OK.

Users started to experience this performance issue after deployment of  MSS 6.0.15.b614 patch.
Prior to the deployment, users did not have such issues.

Customers that moved to MSS 6.0.15.b676 also reported the issue.

Changes

Customers have moved to MSS 6.0.15.b614 and 6.0.15.b676

Cause

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