Cable Pair Block Moving/Saving to Bottom of the CLR/DLR Design When Working Through Smart Task
(Doc ID 1636277.1)
Last updated on MARCH 06, 2019
Applies to:Oracle Communications MetaSolv Solution - Version 6.2.1 and later
Information in this document applies to any platform.
Cable pair blocks are moving to the very bottom of the design lines when the circuit is opened through the Service Request Connection window of the RID/DLRD task, irrespective of their original position in the design lines. This is basically happening in a change order which has a LAM task in it. Even if the user is not doing anything in the LAM task and simply opening the circuit from the RID task, all the existing cable pairs in the circuit end up relocating to the bottom of the design lines. The issue is not seen when the circuit is opened via connection design window.
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