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Circuit Emulation Does Not Work With Group Assignment (Doc ID 2392371.1)

Last updated on MAY 21, 2018

Applies to:

Oracle Communications MetaSolv Solution - Version 6.2.1 and later
Information in this document applies to any platform.

Symptoms

CURRENT BEHAVIOR

Circuit Emulation does not work with Group Assignment

STEPS

Open a RID task, and then went to Options to select Group Assignment.

EXPECTED BEHAVIOR

Group Assignment should support Circuit Emulation

STEPS

The issue can be reproduced with the following steps:

1. Created EWO 429108 with two special circuits:

  - 99/DOXX/185199/ /ACS /
  - 99/DOXX/185200/ /ACS /

2. Design 99/DOXX/185199% as the base circuit
  riding existing BW Facility: 01/KQXX/163998/ /GCN /

3. Use EWO Group Design for the second VC (5200)

4. Verify the DLR design for the first VC (5199)

 

5. Verify the DLR for the second VC 99/DOXX/185200%

BUSINESS IMPACT

Users have to manually identify the missing ports, losing time and impacting time frames.


Changes

 

Cause

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