How to determine MCU0 or MCU1 is being flagged an error or false positive (Doc ID 1994240.1)

Last updated on AUGUST 31, 2016

Applies to:

SPARC T4-4 - Version All Versions and later
SPARC T4-1 - Version All Versions and later
SPARC T4-2 - Version All Versions and later
SPARC T3-4 - Version All Versions and later
SPARC T3-1 - Version All Versions and later
Information in this document applies to any platform.

Symptoms

/SYS/MB/CMP1/MCU1 failed to initialize
System Won't Boot. Possible memory issue

 
[CPU 0:0:0] ERROR: Powering down due to Fatal Error
[CPU 0:0:0] NOTICE: Checking Flash File System
[CPU 0:0:0] NOTICE: Initializing TOD: 2015/03/21 02:04:35
[CPU 0:0:0] NOTICE: Loaded ASR status DB data. Ver. 3.
[CPU 0:0:0] NOTICE: Initializing TPM with:
  tpm_enable = false
  tpm_activate = false
  tpm_forceclear = false
[CPU 0:0:0] NOTICE: TPM found: Ver 1.2, Rev 1.2, SpecLevel 2, errataRev 0, VendorId 'IFX'
[CPU 0:0:0] NOTICE: TPM initialized successfully. Current state is: disabled


[CPU 0:0:0] ERROR: Powering down due to Fatal Error
 

Changes

The  T3-1 and T4-1 systems, the system board fru(/SYS/MB)contains the cpu(/SYS/MB/CMPx),
and the Memory controller (MCU) (/SYS/MB/CMP0/BOBx)integral to it.

The T3-2 and T4-2:For Memory controller (MCU0 & MCU1) is located on the Mother Brd.
Memory errors are most often a result of failed DIMMs but can also can be caused by a faulty memory riser.

The T3-4 and T4-4 Memory controller (MCU) is located ON the PM (Processor Module) not on the MM.

Cause

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