SPARC M8 and SPARC M7 Series Servers : Processor numbering and decoding CPU location
(Doc ID 2020966.1)
Last updated on JUNE 23, 2021
Applies to:SPARC M7-8
Information in this document applies to any platform.
Solaris[TM] device paths and messaging reference the ID of a given processor (in /var/adm/messages, console logs, core files, OBP probing, FMA logs etc.).
By correctly mapping this ID to a physical location, we know that we are servicing the right component to resolve a hardware problem. An incorrect mapping could result in replacing and/or servicing the wrong component and could cause further outages or problems on the platform.
Also, on a sun4v architecture such as the M7 platforms, this may help to understand how the cpus are assigned to the various domains.
When FMA indicts an component, the decoding is obviously automatically done and the indicted CMP or CMIOU is the one to be serviced.
This documents provides information about SPARC M8 and SPARC M7 servers CPU decoding.
References : SPARC M8 and SPARC M7 Servers Administration Guide http://docs.oracle.com/cd/E55211_01/
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