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Ckt Eng Unable To Represent ‘change’ To An EVC (schematic Design Does Not Represent Change To Path (Doc ID 1983950.1)

Last updated on MARCH 23, 2021

Applies to:

Oracle Communications MetaSolv Solution - Version 6.2.1 and later
Information in this document applies to any platform.

Goal

MSS 6.2.1  | Connection Design

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Circuit Engineers are unable to represent ‘change’ to an EVC (Virtual Circuit) on the Schematic Design. Changes are not represented like it does with the Design Lines or Issues – it’s always current state only. This is creating and issue with relaying to the the change to the Field/Installation Techs.

 

Description of Issues:
When you are changing a virtual circuit, the system does not show the old information in disconnected status alongside the new information in Schematic Design. We do have that now on CLRs however the GLR does not. This would be applicable to either a change order or a disco order. different line types - the requirement is to see the "old" vs the "new" or have some sort of "delta report" to easily identify what changes are necessary. Would like the ability to retain the "D lines" just as you can in DLR today as well as ask the user to remove "D lines" when schematic is opened and it contains these Disconnected assignments

Expected Behaviour

1. This is available now on CLRs however for the GLR it does not.
2. This would be applicable to either a change order or a disco order.
3. Different line types - the requirement is to see the "old" vs the "new" or have some sort of "delta report" to easily identify what changes are necessary.
4. Would like the ability to retain the "D lines" just as you can in DLR today as well as ask the user to remove "D lines" when schematic is opened
and it contains these Disconnected assignments.

 

Solution

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In this Document
Goal
Solution
References


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