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How are interrupt levels assigned to PCI devices on SPARC[R] based machines? (Doc ID 1009318.1)

Last updated on MAY 25, 2021

Applies to:

Sun Fire 4800 Server - Version Not Applicable and later
Sun Fire 3800 Server - Version Not Applicable and later
Sun Fire 4810 Server - Version Not Applicable and later
Sun Fire 6800 Server - Version Not Applicable and later
Sun Fire E2900 Server - Version Not Applicable and later
All Platforms

Goal

 This documents the mechanism that assigns processor interrupt levels to specific devices on a PCI bus attached to a SPARC[R] based machine.

Solution

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